niscv

RISC-V emulator and digital logic simulator

Pure Nim score 15/100 · tests present · no docs generated

Summary

Latest Version 0.3.1
License GPL-2.0-or-later
CI Status Failing
Downloads 0
Last Indexed 2026-07-21 05:25

Authors

  • Oliver Thomas, John Scott

Installation

nimble install niscv
choosenim install niscv
git clone https://gitlab.com/OFThomas/niscv

OS Compatibility

Platform Linux macOS Windows FreeBSD OpenBSD NetBSD Android iOS WASM Embedded
niscv - - - - - - -

Dependencies

Package Version Optional
cppstl >= 0.6.2 No
nim >= 1.6.10 No
drawIt >= 0.5.4 No

Source

Repository https://gitlab.com/OFThomas/niscv
Homepage https://gitlab.com/OFThomas/niscv
Registry Source nimble_official

README

Nisc-V

This repo contains minimal code to emulate small parts of the RISC-V ISA.

Documentation is here.

To install dependencies and build the emulator

nimble install

External requirements

sudo apt-get install libelf-dev

Installing the riscv toolchain

git clone https://github.com/riscv/riscv-gnu-toolchain
cd riscv-gnu-toolchain
./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32
make linux

To build and run the tests

nimble test

You can test on a RV32I object file using

niscv ./pathtofile.o

Next steps

I think we've got all of the RV32I instructions

  1. Generate integer instruction subset

To test

Write a C program, compile it to RISC-V assembly, then compile the assembly to an object file.

Test the c program using the riscv toolchain. Then run the object file through the emulator.