TrustNest Platform: Open-Source Computing Platform

Vision

TrustNest is an open-source computing platform that serves as the motherboard and firmware management system for FreeBird and TrustBird APUs. It eliminates traditional BIOS complexity through a hardware-level security interface while providing sovereign computing without proprietary dependencies.

Overview

The TrustNest platform features OpenTitan Root as the next-generation pre-boot, security (RoT), and low-level management processor with a physical interface controller (PIC). This controller manages an I2C OLED display and four tactile buttons for system status and configuration, eliminating BIOS complexity, providing an independent hardware-level security layer, and offering customer-defined security profiles.

Technical Architecture

Firmware Interface

The TrustNest platform implements a security-focused physical interface with: - OpenTitan Root: Next-gen RISC-V RV32IMC processor with veto authority - I2C OLED Display: Shows system status, boot progress, boot loader, and security information - Four Physical Buttons: Provide secure, hardware-level system control without traditional BIOS complexity - OpenTitan Integration: Secure boot chain with Post-Quantum Cryptography verification and ML-KEM-768 key exchange - Veto Authority: Root maintains ultimate system authority with emergency shutdown capability - State-Based UI: Context-sensitive display content based on system state (boot, normal operation, security, error) - Security Level: Hardware-level trust hierarchy

OpenTitan PQC-Ready Root of Trust

The TrustNest platform establishes a quantum-safe security foundation through OpenTitan Root, which serves as the Root of Trust for the entire system. Root communicates with the OpenTitan Darjeeling security processor in the APU's I/O chiplet via a dedicated I3C link, enabling secure coordination between the platform and application processor. This I3C connection facilitates authenticated boot verification, secure key exchange using ML-KEM-768, and real-time security monitoring. The PQC-ready implementation ensures long-term protection against quantum computing threats while maintaining full transparency through open-source hardware design. Crucially, Root performs Just-In-Time (JIT) compilation of the microkernel for the Xiangshan PQC system using a combination of source code, precompiled code segments, and NIST IR 8214C session keys prior to the GRUB stage. This mandatory process verifies and authenticates the chosen kernel before system initialization, ensuring only properly vetted code executes on the system.

Physical Interface

• Display: Computer case-mounted I2C OLED for status visualization and security management
• Controls: Four tactile buttons for secure (RoT) hardware control
• APU Socket: Unified socket supporting both FreeBird and TrustBird APUs
• Memory: Support for LPDDR5X-7500, SO-DIMM DDR5, NVDIMM, NVMe SSD
• Network: 10GbE connectivity
• Sound: Integrated audio codec for system alerts and audio output
• USB: Open source USB controller for peripheral devices

Standards Compliance

• RISC-V RVA23: RV32 architecture compliance for Root
• NIST FIPS 203: ML-KEM-768 Post-Quantum Cryptography standard
• SPDM 1.4: DMTF Security Protocol and Data Model specification
• OpenTitan: Secure boot and Root of Trust implementation
• ISO Standards: ISO 9001 (quality) and ISO 27001 (security)
• Supply Chain Security: ISO 20243 compliance for hardware integrity

Project Structure

├── docs/                 # Technical documentation
├── hardware/
│   └── firmware/         # Firmware and physical interface controller
└── software/
    └── tools/            # Management and configuration tools

Licensing

This project is licensed under the Apache License, Version 2.0. All intellectual property is owned by the FreeDev Foundation, a Swiss non-profit organization.

Contributing

We welcome contributions from the community. Please review our Contribution Guidelines before submitting changes.

Documentation

For detailed technical information about the TrustNest platform architecture, see: - Motherboard Architecture - Complete CXL-centered fabric computing architecture with RV128I and Root PQC RoT integration - OCuLink CXL Expansion Port - High-speed CXL expansion interface with Root security - Root PQC RoT Integration - Hardware-level security processor implementation - Firmware Interface - Root security model and SPDM flow

Related Projects

• FreeBird APU - General-purpose RISC-V APU
• TrustBird APU - Quantum-safe RISC-V APU
• FreeDev Foundation - Governance and standards

Contact

For technical inquiries about TrustNest Platform, please contact: - Technical inquiries: [TBA] - Firmware development: [TBA] - Hardware interface: [TBA]